Load modulation device in a remotely powered integration circuit

ABSTRACT

A load modulation device in a remotely powered integrated circuit includes an oscillating circuit, and a voltage device for regenerating first and second power supply voltages. The voltage device includes at least one MOS transistor in a well on at least one terminal of the oscillating circuit. The at least MOS transistor includes a source or drain connected to the at least one terminal. A bias circuit biases the well to the first or second power supply voltage based upon a modulation signal.

FIELD OF THE INVENTION

The present invention relates to a load modulation device in a remotelypowered integrated circuit. Such a device provides data transmissionbetween the remotely powered integrated circuit and a reader, andprovides a source of an electromagnetic field by causing an equivalentload of the integrated circuit to vary, as seen from the reader. Thisinvention is notably applied to contactless chip cards and to electroniclabels or tags.

BACKGROUND OF THE INVENTION

In such applications, an oscillating circuit of the LC type, forexample, is used for regenerating the power supply and transmitting databetween the card and the reader. The oscillating circuit may be partlyor totally integrated into the integrated circuit or may be externallyoffset.

The oscillating circuit placed in an electromagnetic field delivers atits terminals an alternating signal with the same frequency as thesignal emitted by the reader. The amplitude of this voltage signal ismaximum when the resonant frequency of the oscillating circuit is equalto the emission frequency of the reader.

An integrated circuit for such applications usually comprises a circuitfor rectifying the alternating signal provided by the oscillatingcircuit. The function of the rectifier circuit is to connect thisalternating voltage to a continuous load for matching the load of thelogic circuits of the integrated circuit. In other words, this rectifiercircuit converts the power supply alternating voltage into a DC voltagefor powering the logic circuitry of the integrated circuit.

The load modulation causing the impedance of the tuning circuit, as seenfrom the reader, to vary according to the data to be transmitted. Theintegrated circuit comprises for this purpose a load modulation circuit,controlled by a modulation logic signal delivered by a data transmissionstage of the integrated circuit. The load modulation circuit generallyincludes one or more transistors connected between the output pads ofthe oscillating circuit, and is controlled by the modulation logicsignal.

FIG. 1 illustrates a first exemplary embodiment of a load modulationcircuit in a remotely power integrated circuit. This integrated circuitcomprises conventionally, an oscillating circuit 1 which delivers analternating voltage signal between its terminals A and B, and arectifier circuit 2 for, rectifying this alternating voltage signal toprovide DC power supply voltages Vdd and Gnd to the logic circuitry 3 ofthe integrated circuit. In the example, the rectifier circuit 2 isprovided with a diode bridge D0, D1, D2, D3 and the logic circuitry 3 isillustrated by its equivalent load, with a resistor Re and a capacitorCe parallel-connected between supply voltages Vdd and Gnd.

The load modulation circuit 4 of the oscillating circuit 1 is controlledby a modulation binary signal, marked as mod, and is delivered by a datatransmission stage ED in the logic circuitry 3, not shown.

The load modulation circuit 4 comprises a switching transistor Tm1controlled by the modulation signal mod on its gate. In the example,this is an N-type MOS transistor connected between a modulation node Nmand the power supply voltage Gnd. The load modulation circuit 4 furthercomprises two insulation transistors, one per terminal of theoscillating circuit, which protect the switching transistor Tm1 againstvoltages that are too high. There is an insulation transistor Ti1connected between the terminal A and the node Nm, and an insulationtransistor Ti2 connected between terminal B and node Nm. In the example,both of these are N-type MOS transistors. Each one is mounted as a diodewith its gate and drain connected together.

When the switching transistor Tm1 is driven by the modulation binarysignal mod into the off or blocked state, it is equivalent to a highvalue resistor which is marked as rdsoff. When the switching transistoris driven into the on or conducting state, it is equivalent to a lowvalue resistor which is marked as rdson. The difference betweenresistors rdsoff and rdson generates the load variation. The operatingangular pulsation of the oscillating circuit 1 remains unchanged.

FIG. 2 illustrates another exemplary embodiment of the load modulationcircuit 4. In this example, the load modulation circuit comprises acapacitor Cm and a switching transistor Tm2 connected in series betweenterminals A and B. In the example, the switching transistor is an N-typeMOS transistor, and receives the modulation binary signal mod on itsgate. According to the binary level of the signal mod, the switchingtransistor Tm2 connects capacitor Cm in parallel to the oscillatingcircuit 1. Depending on whether the capacitor Cm is actually connectedin parallel, the capacitor load and the operating pulsation of theoscillating circuit 1 are changed.

These load modulation circuit examples are state of the art, and incommon they require connection of extra components to the oscillatingcircuit 1, which interferes with the quality factor of this circuit. Thequality factor is understood as the overvoltage at its terminals at thecircuit's oscillation frequency. The current load due to extracomponents reduces the overvoltage, and therefore, the efficiency of theoscillating circuit 1.

In addition, extra components bring about a cost overrun in terms ofimplantation area on the integrated circuit. They should actually beable to withstand large voltage changes on the terminals of theoscillating circuit, which may attain 10 to 100 volts.

SUMMARY OF THE INVENTION

In view of the foregoing background, an object of the invention is toprovide a load modulation device in a remotely powered circuit whichdoes not have the above described drawbacks.

This and other objects, advantages and features are provided by usingthe parasitic drain/substrate diode or source/substrate diode of MOStransistors that are implemented in a well. According to the invention,by applying the modulation to the well of a MOS transistor that isconnected through its drain or its source to a terminal of theoscillating circuit, the parasitic drain/well diode or source/well diodemay become conductive. This has the effect of pulling the consideredterminal up to a given voltage level, which amounts to modifying theload of the oscillating circuit, as seen from the reader.

As characterized, the invention therefore relates to a load modulationdevice in a remotely powered integrated circuit, and the deviceregenerates a first and a second power supply voltage for the circuit.The device comprises an oscillating circuit and at least one MOStransistor produced in a well, on at least one terminal of theoscillating circuit. The drain or the source of the at least onetransistor is connected to the at least one terminal.

The invention is further characterized in that the modulation devicecomprises means or a circuit for biasing the well to the first or thesecond power supply voltage according to the level of a modulationbinary signal.

BRIEF DESCRIPTION OF THE DRAWINGS

Other features or advantages of the invention are detailed in thefollowing description of the invention, made in an indicative andnon-limiting way, and with reference to the appended drawings wherein:

FIGS. 1 and 2 each illustrate a remotely powered integrated circuitcomprising a load modulation circuit according to the prior art;

FIG. 3 illustrates a remotely powered integrated circuit comprising aload modulation circuit according to a first exemplary embodiment of theinvention;

FIG. 4 illustrates an alternative of the load modulation circuitillustrated in FIG. 3;

FIG. 5 illustrates a remotely powered integrated circuit comprising aload modulation circuit according to another exemplary embodiment of theinvention; and

FIG. 6 illustrates an electronic system using a remotely poweredintegrated circuit according to the invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the figures, the same components have the same references. Asillustrated in FIG. 6, an electronic system 10 for application to a chipcard, electronic label or tags comprises a reader 11 providing (i.e.,the remote power supply for chip cards or electronic labels 12) anelectromagnetic field B. These chip cards or electronic labels 12comprise an integrated circuit 13 of the remotely powered type.

The remotely powered integrated circuit 13 illustrated in FIG. 3comprises, as in the previous figures, a device for power supplyregeneration comprising an oscillating circuit 1 and a rectifier circuit2, electronic circuitry 3 powered by the regenerated power supplyvoltages Vdd and Gnd, and a load modulation circuit 4 of the oscillatingcircuit.

In the example, the rectifier circuit 2 has a diode bridge structurematching the structure D0, D1, D2, D3 illustrated in FIG. 1. In FIG. 3,these diodes are each produced by a MOS transistor configured as adiode, with its gate and drain connected together.

More specifically, diode D0 is produced by an N-type MOS transistor M1,the source s of which is connected to the power supply voltage Gnd andthe gate g and drain d are connected together to terminal A. Also, diodeD1 is produced by an N-type MOS transistor M1, the source s of which isconnected to the power supply voltage Gnd and the gate g and drain d areconnected together to terminal B. Diode D2 is produced by a P-type MOStransistor M2, the source s of which is connected to the power supplyvoltage Vdd and the gate g and drain d are connected together toterminal A. Diode D3 is produced by a P-type MOS transistor M3, thesource s of which is connected to the power supply voltage Vdd and thegate g and drain d are connected together to terminal B.

Usually, the substrate or the well of a transistor is biased to asuitable voltage, generally to the source voltage, to prevent theparasitic diodes drain/substrate or drain/well and source/substrate orsource/well from conducting, so that leaks may be avoided in thetransistor. This bias is embodied in the figures by a “bulk” biasconnection, between the channel of the transistor and its source.

In an example of MOS technology on a P substrate, the NMOS transistorsare made in the P substrate and the PMOS transistors are made in Nwells. It is possible to have a different bias for each well, accordingto needs, while the bias of the substrate is the same for the wholeintegrated circuit.

In the invention, the bias of the well is used to maintain the parasiticdiode of the well of a MOS transistor connected to a terminal of theoscillating circuit 1 in the non-conducting state or to cause it toconduct. In this way, if the drain of this transistor is connected to aterminal of the oscillating circuit 1, this terminal may be pulled up tothe well bias voltage which causes the associated parasitic diode toconduct. The equivalent load of the oscillating circuit 1 is thuschanged, as seen from the reader.

If the example illustrated in FIG. 3 is considered, using MOS technologyon a P substrate, P MOS transistors M2 and M3 are produced in a well,preferably in the same well. The drain of each of these transistors isconnected to a terminal of the oscillating circuit 1.

The load modulation circuit 4 according to the invention then comprisesmeans driven by a modulation binary signal mod for changing the wellbias voltage of these transistors M2 and M3. In the example, these meansinclude an inverter comprising a PMOS transistor T2 and an NMOStransistor T1 connected between the power supply voltages Vdd and Gnd.The gates of which are connected together and receive the modulationbinary signal mod, and the drains of which are connected together andprovide the output S of the inverter, which is connected to the wellbias connection bkp.

If the modulation binary signal is a 1, it is the transistor T1 of theload modulation circuit 4 which is conducting. The output S is pulleddown to the power supply voltage Gnd. Thus, according to the level ofthe alternating signal on terminals A and B of the oscillating circuit1, at least one parasitic drain/well diode is conducting, pulling theassociated terminal to the power supply voltage Gnd.

If the modulation binary signal is a 0, it is the transistor T2 of theload modulation circuit 4 which is conducting. Output S is pulled up tothe power supply voltage Vdd. The well of transistors M2 and M3 is thenbiased to the power supply voltage Vdd and no drain/well diode isconducting. Transistor T1 is dimensioned to pull down the well biasconnection to the power supply voltage Gnd, more or less rapidly,according to the desired modulation index.

In an alternative embodiment illustrated in FIG. 3, a resistivecomponent Rm is provided in series between the transistor T1 and thepower supply voltage Gnd, which also provides for matching themodulation index of the circuit 4. This resistive component Rm may beproduced by a pure resistor (diffusion, polysilicon, for example) or byan equivalent circuit, for example, a transistor circuit.

In FIG. 4, a dual solution of the one illustrated in FIG. 3 is shown,which corresponds to an integrated circuit produced on an N-typesubstrate. In this example, the NMOS transistors are produced in P-typewells. These wells are normally biased at the power supply voltage Gnd,typically by their source. The load modulation circuit 4 according tothe invention then enables either the well of transistors M0 and M1 tobe normally biased to the power supply voltage Gnd, or to be biased tothe power supply voltage Vdd according to the modulation binary signalmod.

In this example, the output S of the load modulation circuit isconnected to the well bias connection bkn of transistors M0 and M1. Ifit comprises a matching resistor Rm′ for the modulation index, thisresistor is then provided between the power supply voltage Vdd andtransistor T2, in order to raise the output S of the circuit to thepower supply voltage Vdd, more or less rapidly.

Another example of a remotely powered integrated circuit with a loadmodulation circuit according to the invention is illustrated in FIG. 4.The difference with the solution illustrated in FIG. 3 lies in that theMOS transistors of the rectifier circuit 2 are mounted differently. Inthis example, transistors M0 and M2 form a first inverter, with theirgates connected together on terminal A and their drains connectedtogether on terminal B. Transistors M1 and M3 form another inverter withtheir gates connected together on terminal B and their drains connectedtogether on terminal A. A rectifier structure is obtained with inverterswith input/output feedback on terminals A and B of the oscillatingcircuit 1 for regenerating power supply voltages Vdd and Gnd.

In this example, the load modulation circuit 4 according to theinvention is applied in the same way as in FIG. 3. For transistors M2and M3, produced in N wells, the well bias connection is connected tothe output of the load modulation circuit 4, which has the samestructure as in FIG. 3.

The invention may also be applied to configurations of the device forregenerating power supply voltages Vdd and Gnd, wherein there would be atransistor produced in a well connected through its source to a terminalof the oscillating circuit 1. In this well, it is the well source diodewhich allows the modulation according to the invention to be applied.

It will also be noted that the load modulation circuit 4 according tothe invention preferably comprises at least one well transistor perterminal of the oscillating circuit. However, it may include a welltransistor on only one terminal even if the efficiency of the loadmodulation circuit 4 is lower in this well.

More generally, as on at least one terminal of the oscillating circuit1, at least one MOS transistor produced in a well has its drain orsource connected to the relevant terminal. A load modulation circuit 4according to the invention may be provided to change the well biasvoltage according to the modulation binary signal mod.

It will be noted that it is not very important whether the MOStransistors M2 and M3 of FIGS. 3 and 5 are each produced in a separateor in a same well. The same remark applies to transistors M0 and M1 ofFIG. 4.

The load modulation device 4 according to the invention is particularlystraightforward to implement and does not add any load onto theoscillating circuit 1. Thus, the quality factor of the oscillatingcircuit 1 is the same with or without modulation. In addition, the loadmodulation circuit 4 does not have to withstand large voltagedifferences which may occur on the terminals of the oscillatingcircuits. It is therefore of smaller dimensions, resulting insubstantial savings in silicon surface area for the integrated circuit.

If, as illustrated in FIGS. 3-5, the integrated circuit comprises aninsulating device 5 connected between the power supply output Vdd of therectifier circuit 2 and the matching input on the internal circuits 3,the load modulation circuit 4 will be placed upstream between therectifier circuit 2 and the insulating device 5.

What is claimed is:
 1. A load modulation device in a remotely poweredintegrated circuit and comprising: an oscillating circuit; aregeneration circuit connected to said oscillating circuit forregenerating first and second power supply voltages and comprising awell and at least one MOS transistor formed therein; and a bias circuitfor biasing the well to the first or second power supply voltage basedupon a modulation signal.
 2. A load modulation device according to claim1, wherein the modulation signal is a binary modulation signal.
 3. Aload modulation device according to claim 1, wherein the remotelypowered integrated circuit comprises an electronic circuit that ispowered by the first and second power supply voltages.
 4. A loadmodulation device according to claim 1, wherein said at least one MOStransistor comprises a plurality of MOS transistors; and wherein thewell has a same type of conductivity as said plurality of MOStransistors.
 5. A load modulation device according to claim 1, whereinsaid oscillating circuit comprises a pair of terminals; and wherein saidregeneration circuit comprises a voltage rectifier connected between thepair of terminals and provides at an output thereof the first and secondpower supply voltages.
 6. A load modulation device according to claim 1,wherein the remotely powered integrated circuit comprises a datatransmission stage for providing the modulation signal; wherein saidbiasing circuit comprises an inverter connected between the first andsecond power supply voltages; and wherein said inverter comprises aninput for receiving the modulation signal and an output connected to thewell.
 7. A load modulation device according to claim 6, wherein said atleast one MOS transistor has associated therewith a parasitic diode; andwherein said inverter comprises: a first transistor for pulling theoutput up to the first power supply voltage for blocking the parasiticdiode; and a second transistor for pulling the output down to the secondpower supply voltage for causing the parasitic diode to conduct.
 8. Aload modulation device according to claim 7, wherein said biasingcircuit further comprises a resistive component connected between saidsecond transistor and the second power supply voltage.
 9. A loadmodulation device according to claim 8, wherein dimensions of saidsecond transistor are based upon a desired modulation index; and whereinsaid resistive component has a resistivity based upon the desiredmodulation index.
 10. A remotely powered integrated circuit comprising:an oscillating circuit; a regeneration circuit connected to saidoscillating circuit for regenerating first and second power supplyvoltages and comprising a well and at least one MOS transistor formedtherein; a bias circuit for biasing the well to the first or secondpower supply voltage based upon a modulation signal; and an electroniccircuit that is powered by the first and second power supply voltages,and provides the modulation signal.
 11. A remotely powered integratedcircuit according to claim 10, wherein the modulation signal is a binarymodulation signal.
 12. A remotely powered integrated circuit accordingto claim 10, wherein said at least one MOS transistor comprises aplurality of MOS transistors; and wherein the well has a same type ofconductivity as said plurality of MOS transistors.
 13. A remotelypowered integrated circuit according to claim 10, wherein saidoscillating circuit comprises a pair of terminals; and wherein saidregeneration circuit comprises a voltage rectifier connected between thepair of terminals and provides at an output thereof the first and secondpower supply voltages.
 14. A remotely powered integrated circuitaccording to claim 10, wherein said biasing circuit comprises aninverter connected between the first and second power supply voltages;and wherein said inverter comprises an input for receiving themodulation signal and an output connected to the well.
 15. A remotelypowered integrated circuit according to claim 14, wherein said at leastone MOS transistor has associated therewith a parasitic diode; andwherein said inverter comprises: a first transistor for pulling theoutput up to the first power supply voltage for blocking the parasiticdiode; and a second transistor for pulling the output down to the secondpower supply voltage for causing the parasitic diode to conduct.
 16. Aremotely powered integrated circuit according to claim 15, wherein saidbiasing circuit further comprises a resistive component connectedbetween said second transistor and the second power supply voltage. 17.A remotely powered integrated circuit according to claim 16, whereindimensions of said second transistor are based upon a desired modulationindex; and wherein said resistive component has a resistivity based uponthe desired modulation index.
 18. A chip card comprising: a substrate; aremotely powered integrated circuit on said substrate and comprising anoscillating circuit, a regeneration circuit connected to saidoscillating circuit for regenerating first and second power supplyvoltages and comprising a well and at least one MOS transistor formedtherein, and a bias circuit for biasing the well to the first or secondpower supply voltage based upon a modulation signal.
 19. A chip cardaccording to claim 18, wherein the modulation signal is a binarymodulation signal.
 20. A chip card according to claim 18, wherein saidremotely powered integrated circuit comprises an electronic circuit thatis powered by the first and second power supply voltages.
 21. A chipcard according to claim 18, wherein said at least one MOS transistorcomprises a plurality of MOS transistors; and wherein the well has asame type of conductivity as said plurality of MOS transistors.
 22. Achip card according to claim 18, wherein said oscillating circuitcomprises a pair of terminals; and wherein said regeneration circuitcomprises a voltage rectifier connected between the pair of terminalsand provides at an output thereof the first and second power supplyvoltages.
 23. A chip card according to claim 18, wherein said remotelypowered integrated circuit comprises a data transmission stage forproviding the modulation signal; wherein said biasing circuit comprisesan inverter connected between the first and second power supplyvoltages; and wherein said inverter comprises an input for receiving themodulation signal and an output connected to the well.
 24. A chip cardaccording to claim 23, wherein said at least one MOS transistor hasassociated therewith a parasitic diode; and wherein said invertercomprises: a first transistor for pulling the output up to the firstpower supply voltage for blocking the parasitic diode; and a secondtransistor for pulling the output down to the second power supplyvoltage for causing the parasitic diode to conduct.
 25. A chip cardaccording to claim 24, wherein said biasing circuit further comprises aresistive component connected between said second transistor and thesecond power supply voltage.
 26. A chip card according to claim 25,wherein dimensions of said second transistor are based upon a desiredmodulation index; and wherein said resistive component has a resistivitybased upon the desired modulation index.
 27. An electronic systemcomprising: a reader for providing an electromagnetic field; and a chipcard comprising a substrate, and an integrated circuit on said substrateand being remotely powered by the electromagnetic field, said integratedcircuit comprising an oscillating circuit, a regeneration circuitconnected to said oscillating circuit for regenerating first and secondpower supply voltages and comprising a well and at least one MOStransistor formed therein, and a bias circuit for biasing the well tothe first or second power supply voltage based upon a modulation signal.28. An electronic system according to claim 27, wherein the modulationsignal is a binary modulation signal.
 29. An electronic system accordingto claim 27, wherein said remotely powered integrated circuit comprisesan electronic circuit that is powered by the first and second powersupply voltages.
 30. An electronic system according to claim 27, whereinsaid at least one MOS transistor comprises a plurality of MOStransistors; and wherein the well has a same type of conductivity assaid plurality of MOS transistors.
 31. An electronic system according toclaim 27, wherein said oscillating circuit comprises a pair ofterminals; and wherein said regeneration circuit comprises a voltagerectifier connected between the pair of terminals and provides at anoutput thereof the first and second power supply voltages.
 32. Anelectronic system according to claim 27, wherein said integrated circuitfurther comprises a data transmission stage for providing the modulationsignal; wherein said biasing circuit comprises an inverter connectedbetween the first and second power supply voltages; and wherein saidinverter comprises an input for receiving the modulation signal and anoutput connected to the well.
 33. An electronic system according toclaim 32, wherein said at least one MOS transistor has associatedtherewith a parasitic diode; and wherein said inverter comprises: afirst transistor for pulling the output up to the first power supplyvoltage for blocking the parasitic diode; and a second transistor forpulling the output down to the second power supply voltage for causingthe parasitic diode to conduct.
 34. An electronic system according toclaim 33, wherein said biasing circuit further comprises a resistivecomponent connected between said second transistor and the second powersupply voltage.
 35. A method for remotely powering an integratedcircuit, the method comprising: receiving electromagnetic energy via anoscillating circuit; regenerating first and second power supply voltagesbased upon the electromagnetic energy using a regeneration circuitcomprising a well and at least one MOS transistor formed therein; andbiasing the well to the first or second power supply voltage based upona modulation signal.
 36. A method according to claim 35, wherein the atleast one MOS transistor comprises a plurality of MOS transistors; andwherein the well has a same type of conductivity as the plurality oftransistors.
 37. A method according to claim 35, wherein the oscillatingcircuit comprises a pair of terminals; and wherein the regenerationcircuit comprises a voltage rectifier connected between the pair ofterminals and provides at an output thereof the first and second powersupply voltages.
 38. A method according to claim 35, wherein theintegrated circuit comprises a data transmission stage for providing themodulation signal; and wherein the biasing is provided using a biasingcircuit comprising an inverter connected between the first and secondpower supply voltages; and wherein the inverter comprises an input forreceiving the modulation signal and an output connected to the well. 39.A method according to claim 38, wherein the at least one MOS transistorhas associated therewith a parasitic diode; and wherein the invertercomprises: a first transistor for pulling the output up to the firstpower supply voltage for blocking the parasitic diode; and a secondtransistor for pulling the output down to the second power supplyvoltage for causing the parasitic diode to conduct.